High speed IQ demodulation in FPGA – Ultrasound echo processing (some concepts)

I am building hardware for an ultrasound imaging system from scratch. The system overview and flow of ultrasound imaging will be explained soon in another post. Here I will explain a portion of the flow where analog-to-digital converted echo signals are poring into the FPGA (a typical echo signal looks as shown below). The signals… Read More High speed IQ demodulation in FPGA – Ultrasound echo processing (some concepts)